Principles of Verifiable RTL Design
A Functional Coding Style Supporting Verification Processes in Verilog
Foster, Harry D.
|Publication Date:||Apr 2013|
| Book Format:||Paperback|
|List Price:||USD $99.00|
| Book Description: |
Principles of Verifiable RTL Design: A Functional Coding Style Supporting Verification Processes in Verilog explains how you can write Verilog to describe chip designs at the RT-level in a manner that cooperates with verification processes. This cooperation can return an order of magnitude improvement in performance and capacity from tools such as simulation and equivalence checkers. It reduces the labor costs of coverage and formal model checking by facilitating communication between... More Description