S Sapatnekar

S Sapatnekar is the author of "Layout Optimization in VLSI Design", "Design Automation for Timing-Driven Layout Synthesis" and "Timing Analysis and Optimization of Sequential Circuits".

Books by S Sapatnekar

Timing Analysis a...
Maheshwari, Naresh
Electronic book text: $189.00

Timing Analysis a...
Maheshwari, Naresh
Paperback: $109.99

Design Automation...
Sapatnekar, S.
Electronic book text: $259.00

Timing Analysis a...
Maheshwari, Naresh
Paperback: