VHDL A Logic Synthesis Approach |
|
| Author:
| Jones, Simon
Naylor, David |
| ISBN: | 978-0-412-61650-1 |
| Publication Date: | Jan 1997 |
| Publisher: | Springer London, Limited
|
| Book Format: | Hardback |
| List Price: | AUD $415.95 |
Book Description:
|
This book is structured in a practical, example-driven, manner. The use of VHDL for constructing logic synthesisers is one of the aims of the book; the second is the application of the tools to the design process. Worked examples, questions and answers are provided together with do and don'ts of good practice. An appendix on logic design the source code are available free of charge over the Internet.
This book is structured in a practical, example-driven, manner. The use of VHDL for constructing logic synthesisers is one of the aims of the book; the second is the application of the tools to the design process. Worked examples, questions and answers are provided together with do and don'ts of good practice. An appendix on logic design the source code are available free of charge over the Internet.