Spacer Engineered FinFET Architectures High-Performance Digital Circuit Applications |
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| Author:
| Dasgupta, Sudeb
Kaushik, Brajesh Kumar
Pal, Pankaj Kumar |
| ISBN: | 978-1-315-19108-9 |
| Publication Date: | Jun 2017 |
| Publisher: | Taylor & Francis Group
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| Imprint: | CRC Press |
| Book Format: | Digital (delivered electronically) |
| List Price: | USD $54.95 |
Book Description:
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This book focusses on the spacer engineering aspects of novel MOS-based device-circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the FinFET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.
This book focusses on the spacer engineering aspects of novel MOS-based device-circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the FinFET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.