| Verilog Digital System Design Register Transfer Level Synthesis, Testbench, and Verification | | Author:
| Navabi, Zainalabedin | ISBN: | 978-0-07-144564-1 | Publication Date: | Oct 2005 | Publisher: | McGraw-Hill Professional Publishing
| Book Format: | Hardback | List Price: | USD $89.95 | Book Description:
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